Implementing Null Conventional Logic using Gate Diffusion Input
Department
Electrical and Computer Engineering
Major
Computer Engineering
Research Advisor
Choi, Minsu
Advisor's Department
Electrical and Computer Engineering
Funding Source
National Science Foundation
Abstract
Asynchronous circuit designs have seen a resurgence in the research community lately as they promise higher energy efficiency and performance than similar clocked architectures. One way of implementing general purpose asynchronous circuits is using Null Conventional Logic (NCL). This project determined the feasibility and advantages of implementing NCL with Gate Diffusion Input (GDI) versus traditional CMOS implementations. GDI promises further reduced power consumption and reduced area when compared to CMOS. This is synergistic with NCL as NCL requires additional space when compared to traditional clocked logic. The benefits of this approach were tested by designing an optimized NCL implementation using GDI and comparing it in simulations against traditional systems.
Biography
Caleb Olson is a Junior undergraduate student in Computer Engineering at the Missouri University of Science and Technology. This year he has been working as an undergraduate research assistant to Dr. Minsu Choi, researching low power computing techniques. He has also worked as an undergraduate research assistant to Dr. Y. Rosa Zheng from May to November 2015. There he worked on her Multi-coil Magneto-Inductive Communications research. Caleb is currently in charge of the Missouri S&T Solar Car Team’s electrical division. After receiving his Bachelor’s Degree, he plans to pursue his Master’s Degree in Computer Engineering.
Research Category
Engineering
Presentation Type
Poster Presentation
Document Type
Poster
Location
Upper Atrium/Hallway
Presentation Date
11 Apr 2016, 1:00 pm - 3:00 pm
Implementing Null Conventional Logic using Gate Diffusion Input
Upper Atrium/Hallway
Asynchronous circuit designs have seen a resurgence in the research community lately as they promise higher energy efficiency and performance than similar clocked architectures. One way of implementing general purpose asynchronous circuits is using Null Conventional Logic (NCL). This project determined the feasibility and advantages of implementing NCL with Gate Diffusion Input (GDI) versus traditional CMOS implementations. GDI promises further reduced power consumption and reduced area when compared to CMOS. This is synergistic with NCL as NCL requires additional space when compared to traditional clocked logic. The benefits of this approach were tested by designing an optimized NCL implementation using GDI and comparing it in simulations against traditional systems.
