Abstract
A new method to improve the performance of digital current-mode controllers used in dc-dc power conversion is introduced. The proposed scheme is based on a simple prediction method which offers more time for DSP calculations than its conventional counterparts. Therefore, there will be less DSP computational time delay, which results in faster dynamic response and more accuracy and stability in power electronic converters. Principles of operation of the proposed prediction method as well as its application to several digital control techniques are presented.
Recommended Citation
K. Wan and M. Ferdowsi, "Reducing Computational Time Delay in Digital Current-Mode Controllers for Dc-dc Converters," Proceedings of the IEEE 30th International Telecommunications Energy Conference, 2008, Institute of Electrical and Electronics Engineers (IEEE), Sep 2008.
The definitive version is available at https://doi.org/10.1109/INTLEC.2008.4664114
Meeting Name
IEEE 30th International Telecommunications Energy Conference, 2008
Department(s)
Mechanical and Aerospace Engineering
Second Department
Electrical and Computer Engineering
Keywords and Phrases
DC-DC Power Convertors; Current-Mode Circuits; Delays; Digital Signal Processing Chips; Dynamic Response
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Sep 2008
