On Fault Modeling and Testing of Content-addressable Memories

Waleed K. Al-Assadi, Missouri University of Science and Technology
A. P. Jayasumana
Y. K. Malaiya

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Associative or content addressable memories can be used for many computing applications. This paper discusses fault modeling for the content addressable memory (CAM) chips. Detailed examination of a single CAM cell is presented. A functional fault model for a CAM architecture executing exact match derived from the single cell model is presented. An efficient testing strategy can be derived using the proposed fault model