This paper presents a multi-processor control system for a general purpose five-level cascaded inverter for real time power system applications. Practical design considerations for the digital controller architecture as well as the power converter are discussed and a 3 kVA laboratory prototype is presented. As a case study, a StatCom with battery energy storage was implemented on this multi-processor controlled inverter system. To eliminate the troublesome PI parameter tuning and the limitation of small signal models, which exist in conventional control for StatComs, a new and simple control method based on large signal model was designed to realize four-quadrant power injections into a grid. Experimental results are provided to support the proposed concept.
C. Qian et al., "A Multi-Processor Control System Architecture for a Cascaded StatCom with Energy Storage," Proceedings of the 19th Annual IEEE Applied Power Electronics Conference and Exposition (2004, Anaheim, CA), vol. 3, pp. 1757-1763, Institute of Electrical and Electronics Engineers (IEEE), Feb 2004.
The definitive version is available at https://doi.org/10.1109/APEC.2004.1296104
19th Annual IEEE Applied Power Electronics Conference and Exposition (2004: Feb. 22-26, Anaheim, CA)
Electrical and Computer Engineering
United States. Department of Energy
Keywords and Phrases
3 KVA; Battery Energy Storage; Cascaded StatCom; Cascaded Inverter; Control Systems; Digital Control; Digital Controller Architecture; Energy Storage; Four-Quadrant Power Injection; Invertors; Multiprocessing Systems; Multiprocessor Control System Architecture; Power Converter; Power Convertors; Prototype; Prototypes; Real Time Power System Applications; Static VAr Compensators
International Standard Book Number (ISBN)
Article - Conference proceedings
© 2004 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Feb 2004