Abstract

A physics-based circuit modeling methodology for system-level power integrity (PI) analysis and design is presented herein. The modeling methodology is based on representing the current paths in the power distribution network (PDN) with appropriate circuits based on cavity model and plane-pair partial element equivalent circuit (PEEC). The PDN input impedance looking from on-chip sources can be computed. A commercial simulation tool is used to corroborate the modeling approach where the system consists of a commercial integrated circuit, a complex organic package and a very high-layer-count printed circuit board. Two types of circuit models are proposed from the methodology with physical correspondence maintained in the circuit elements. The circuits can be used to analyze the geometry impact on the PDN impedance and explore design improvements. Voltage ripple simulations are conducted with the circuit models. The simulated results correlated with measurements. The modeling methodology helps to understand the impact of the fundamental physics of the different parts of the PDN system and the impact of changes in the PI designs.

Department(s)

Electrical and Computer Engineering

Comments

National Science Foundation, Grant IIP-1440110

Keywords and Phrases

Cavity model; input impedance; plane pair partial element equivalent circuit (PPP); power distribution network (PDN) design; power integrity (PI); system PDN; voltage ripple

International Standard Serial Number (ISSN)

1558-187X; 0018-9375

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Aug 2020

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