This paper provides a SPICE-compatible circuit model for characterizing electrostatic discharge (ESD) clamping performance of protection devices mounted on printed circuit boards (PCBs). An equivalent circuit model for a commercial ESD generator is introduced and a simulation methodology of an ESD protection device with non-linear resistance characteristic using voltage controlled current source is described. These models combined to create a full circuit model with a PCB model in a SPICE-like circuit simulator. Comparison results between the simulated and measured are presented to verify the accuracy of the proposed circuit model. A trade-off analysis between the ESD clamping performance and signal integrity with the ESD protection device in high-speed applications is also presented as a case study.
B. Seol et al., "A Circuit Model for ESD Performance Analysis of Printed Circuit Boards," Proceedings of the 2008 Electrical Design of Advanced Packaging and Systems Symposium, 2008, Institute of Electrical and Electronics Engineers (IEEE), Dec 2008.
The definitive version is available at https://doi.org/10.1109/EDAPS.2008.4736014
2008 Electrical Design of Advanced Packaging and Systems Symposium, 2008
Electrical and Computer Engineering
Article - Conference proceedings
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Dec 2008