Abstract
In this paper, we proposed a nano-power tunable bump circuit. It incorporates a novel source-degenerated trans conductor using pseudo-resistor as source resistor to control the width of the bump. The presented circuit is simulated in Cadence using 180nm CMOS process under 1.8V power supply. The results show that the transconductance is tuned with pseudo-resistor and the bump circuit can operate with wide voltage range from 0.3V to 1.8V. Also, this circuit is compact and only dissipates 16.7nW power which makes it perfect for large-scale machine learning applications such as classifier and support vector machine.
Recommended Citation
Y. He et al., "An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor," Proceedings - International SoC Design Conference, ISOCC 2020, pp. 131 - 132, article no. 9332988, Institute of Electrical and Electronics Engineers, Oct 2020.
The definitive version is available at https://doi.org/10.1109/ISOCC50952.2020.9332988
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
bump circuit; CMOS integrated circuits; pseudo-resistor; transconductor
International Standard Book Number (ISBN)
978-172818331-2
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
21 Oct 2020
