Abstract
Multi-Threshold null convention logic (MTNCL) is a novel low power paradigm for designing asynchronous null convention logic (NCL) circuits. To further reduce the dynamic power consumption, a new methodology that utilizes gate diffusion input technique is proposed. The proposed approach is used to realize MTNCL gates and a decrease in the transistor count is observed that tend to reduce the dynamic power consumption. Compared to SMTNCL approach, the proposed methodology shows a 5.6% is reduction in the power consumption for the MTNCL gates.
Recommended Citation
P. Metku et al., "Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach," Proceedings - International SoC Design Conference, ISOCC 2020, pp. 282 - 283, article no. 9332941, Institute of Electrical and Electronics Engineers, Oct 2020.
The definitive version is available at https://doi.org/10.1109/ISOCC50952.2020.9332941
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
cadence; CMOS; gate diffusion input; Multi-Threshold NULL convention logic
International Standard Book Number (ISBN)
978-172818331-2
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
21 Oct 2020
