Interleaving PWM waveforms is a proven method to reduce ripple in dc-dc converters. The present work explores interleaving for three-phase motor drives. Fourier analysis shows that interleaving the carriers in conventional uniform PWM significantly reduces the common-mode voltage. New DSP hardware supports interleaving directly with changes to just two registers at setup time, so no additional computation time is needed during operation. The common-mode voltage reduction ranges from 36% at full modulation to 67% when idling with zero modulation. Third harmonic injection slightly reduces the advantage (to 26% at full modulation). However, the maximum RMS common-mode voltage is still less than 20% of the bus voltage under all conditions. Low-voltage experimental results support the findings.
J. W. Kimball and M. J. Zawodniok, "Reducing Common-Mode Voltage in Three-Phase Sine-Triangle PWM with Interleaved Carriers," Proceedings of the 25th Annual IEEE Applied Power Electronics Conference and Exposition (2010, Palm Springs, CA), pp. 1508-1513, Institute of Electrical and Electronics Engineers (IEEE), Feb 2010.
The definitive version is available at https://doi.org/10.1109/APEC.2010.5433431
25th Annual IEEE Applied Power Electronics Conference and Exposition (2010: Feb. 21-25, Palm Springs, CA)
Electrical and Computer Engineering
ITW Military GSE
National Science Foundation (U.S.). Industry/University Cooperative Research Centers Program
Keywords and Phrases
DC-DC Power Convertors; PWM Power Convertors; Digital Signal Processing Chips; Fourier Analysis; Additional Computation Time; Bus Voltage; Common Mode Voltage; DSP Hardware; Low-Voltage; Set-Up Time; Third Harmonic; Three Phase Motor; Uniform PWM; Wave Forms; Zero Modulation; Electric Drives; Pulse Modulation; Pulse Width Modulation; Power Electronics
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Article - Conference proceedings
© 2010 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Feb 2010