Surface roughness topography of printed circuit boards (PCBs) needs to be included in SI simulations in order to accurately predict the insertion loss of the structure. An effective roughness dielectric (ERD) model can be used to substitute an inhomogeneous interface between copper foil and laminate dielectric in a PCB. Herein, this approach is tested for verification using 3D full-wave numerical simulations. These effective roughness dielectric layers with the appropriate complex permittivity are included in the modeling of strip line examples. The parameters of an ambient laminate dielectric free of conductor roughness effects in the strip line are determined using differential extrapolation roughness measurement technique (DERM). The agreement of the results of 3D full-wave modeling simulations with the proposed approach and measurements justifies the proposed approach.
T. Vincent et al., "Effective Roughness Dielectric In A PCB: Measurement And Full-wave Simulation Verification," IEEE International Symposium on Electromagnetic Compatibility, pp. 798 - 802, article no. 6899077, Institute of Electrical and Electronics Engineers, Sep 2014.
The definitive version is available at https://doi.org/10.1109/ISEMC.2014.6899077
Electrical and Computer Engineering
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15 Sep 2014