Designing and Supporting HMO, an Integrated Hardware Microcode Optimizer
This Paper Discusses an Algorithm for Optimizing the Density and Parallelism of Microcoded Routines in Microprogrammable Machines. Besides Presenting the Algorithm itself, This Research Also Analyzes the Algorithm's Uses, Design Integration Problems, Architectural Requirements and Adaptability to Conventional Machine Characteristics. Even Though the Paper Proposes a Hardware Implementation of the Algorithm, the Algorithm is Viewed as an Integral Part of the Entire Microcode Generation and Usage Process, from Initial High-Level Input into a Software Microcode Compiler Down to Machine-Level Execution of the Resultant Microcode on the Host Machine. It is Believed that, by Removing Much of the Traditionally Time-Consuming and Machine-Dependent Microcode Optimization from the Software Portion of This Process, the Algorithm Can Improve the overall Process. © 1976.
J. O. Bondi and P. D. Stigall, "Designing and Supporting HMO, an Integrated Hardware Microcode Optimizer," Computers and Electrical Engineering, vol. 3, no. 3, pp. 319 - 337, Elsevier, Jan 1976.
The definitive version is available at https://doi.org/10.1016/0045-7906(76)90035-5
Electrical and Computer Engineering
International Standard Serial Number (ISSN)
Article - Journal
© 2023 Elsevier, All rights reserved.
01 Jan 1976