Power Delivery Network Optimization Approach using an Innovative Hybrid Target Impedance


A well-designed power delivery network (PDN) demands a set of efficient and effective modeling and optimization methodology for the Chip-Package-PCB System. This paper work provided and validated the hybrid target impedance for the PDN impedance optimization in frequency domain and the physics-based equivalent circuit model with small signal model for voltage response validation in time domain. The hybrid target impedance defined with current profile-based discrete and continuous target impedance. Two key impedance points in discrete were identified for on-chip worst case switching scenario and voltage regulator module switching ripple, more points can be added if specific core power switching scenario identified. The continuous impedance points are from the conventional target impedance by voltage ripple to dynamic current change. This hybrid method provides a more effective and convergent way to perform system level decoupling capacitors optimization in frequency domain and to meet voltage specification in time domain, also to avoid overdesigning for cost saving.

Meeting Name

2019 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMC+SIPI 2019 (2019: Jul. 22-26, New Orleans, LA)


Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Chip Power Model; CPM; PCB; PDN; PI; Power Delivery Network; Power Integrity; Target Impedance; VRM

International Standard Book Number (ISBN)


Document Type

Article - Conference proceedings

Document Version


File Type





© 2019 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jul 2019