Application of Deep Learning for High-Speed Differential Via TDR Impedance Fast Prediction


A deep neural network (DNN) model is developed in this paper for fast prediction of time-domain reflectometer (TDR) impedance for differential vias in high-speed printed circuit boards (PCBs). Unlike traditional empirical linear modeling approaches, the DNN model more accurately maps the nonlinearity between via geometrical parameters and differential impedance. How to select neural network type, training functions and how to select an efficient set of training data are discussed in the paper. Good correlations between the predicted impedances and target values prove the accuracy and reliability of the DNN model. The calculation time for a single data point is reduced to milliseconds, so that the design efficiency of high-speed differential via design is significantly increased.

Meeting Name

2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity, EMC, SI and PI 2018 (2018: Jul. 30-Aug. 3, Long Beach, CA)


Electrical and Computer Engineering

Keywords and Phrases

Busbars; Electromagnetic compatibility; Geometry; Printed circuit boards; Reflectometers; Time domain analysis; Design efficiency; Differential impedance; Differential via; High-speed channels; Learning methods; Printed circuit board (PCBs); Time-domain reflectometers; Via modeling; Deep neural networks (DNN); Deep learning method; High-speed channel design; TDR impedance; Via model

International Standard Book Number (ISBN)


Document Type

Article - Conference proceedings

Document Version


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© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jul 2018