Current Mode Four-Quadrant Multiplier Design using CNTFET
This paper proposes presents a low power and highspeed four-quadrant analog multiplier in the current mode based on dual translinear loops using 32nm CMOS and 32nm CNTFET technologies to investigate and compare the performance differences of the analog circuits on CNTFET technology and CMOS 32nm technology nodes. All the simulations were performed using hspice with 32nm CMOS from PTM library and 32nm CNTFET from Stanford University technologies at the same power supply level. CNTFET based multiplier shows a wider linearity over considerable range of outputs (-10μA to +10μA) while the CMOS based multiplier shows (-7μA to +7μA) and the 3db frequency of the CNTFET based multiplier is 110GHz while the 3dB frequency of the CMOS based multiplier is only 2.45GHz.
G. Jeon et al., "Current Mode Four-Quadrant Multiplier Design using CNTFET," Proceedings of the International SoC Design Conference (2016, Jeju, South Korea), pp. 283-284, Institute of Electrical and Electronics Engineers (IEEE), Oct 2016.
The definitive version is available at https://doi.org/10.1109/ISOCC.2016.7799788
International SoC Design Conference: ISOCC (2016: Oct. 23-26, Jeju, South Korea)
Electrical and Computer Engineering
Keywords and Phrases
Carbon; Carbon Nanotubes; CMOS Integrated Circuits; Integrated Circuit Design; Low Power Electronics; Nanotubes; CNTFET Technologies; Emerging Technologies; Four-Quadrant Analog Multipliers; Four-Quadrant Multiplier; Low-Power Circuit; Multiplier Design; Stanford University; Translinear Loops; Frequency Multiplying Circuits; Carbon Nano Tube FET(CNTFET); Emerging Technology
International Standard Book Number (ISBN)
Article - Conference proceedings
© 2016 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Oct 2016