Configurable Logic Block (CLB) Design for Asynchronous Nanowire Crossbar System

Abstract

In this work, a novel design and optimization method for programmable gate macro blocks (PGMB) in the newly proposed Asynchronous Nanowire Reconfigurable Crossbar Architecture (ANRCA) is presented. ANRCA is based on a self-timed logic referred to as the Null Convention Logic (NCL). Since there is no global clocking and clock distribution network, all failure modes related to timing will be either eliminated or relaxed. The proposed architecture is anticipated to have higher manufacturability and robustness that are critical factors in nanoscale systems due to nondeterministic nature of nanoassembly. In order to facilitate efficient programming and flexible reconfiguration, a new hierarchical reconfigurable architecture for ANRCA is also proposed. Various configurable logic block structures have been considered and also their programming and reconfiguration issues are discussed.

Meeting Name

IEEE 55th International Midwest Symposium on Circuits and Systems: MWSCAS (2012: Aug. 5-8, Boise, ID)

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Asynchronous Computing; Configurable Logic Blocks; Critical Factors; Crossbar Architecture; Flexible Reconfiguration; Macro Block; Manufacturability; Nano-Assemblies; Nano-Scale System; Novel Design; Null Convention Logic (NCL); Programmable Gate; Proposed Architectures; Reconfigurable Logic; Self-Timed; Clock Distribution Networks; Clocks; Differentiating Circuits; Optimization; Reconfigurable Architectures; Nanowires; Nanowire Crossbar

International Standard Book Number (ISBN)

978-1467325264; 978-1467325271

International Standard Serial Number (ISSN)

1548-3746; 1558-3899

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2012 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Aug 2012

Link to Full Text

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