Effects of TVS Integration on System Level ESD Robustness
Abstract
Higher integration of Transient Voltage Suppression (TVS) functionality into ASIC I/O cells implies lower system costs. But as the ESD pulse is directed deeper into the system, migrating the TVS clamping function from the periphery of the system to a central ASIC may actually reduce the system's ESD robustness. ESD current reconstruction scanning can be used to trace the current path on a PCB, and possibly within an IC. The article compares the current spreading during and ESD for different ESD protection methods.
Recommended Citation
W. Huang et al., "Effects of TVS Integration on System Level ESD Robustness," Proceedings of the 32nd Electrical Overstress/Electrostatic Discharge Symposium (2010, Reno, NV), Institute of Electrical and Electronics Engineers (IEEE), Oct 2010.
Meeting Name
32nd Electrical Overstress/Electrostatic Discharge Symposium (2010: Oct. 3-8, Reno, NV)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Current Paths; Current Reconstruction; Current Spreading; ESD Protection; ESD Robustness; Higher Integration; System Costs; System-level ESD; Transient Voltage; Electric Power Supplies to Apparatus; Electrostatic Discharge; Polychlorinated Biphenyls; Electrostatic Devices
International Standard Book Number (ISBN)
978-1585371822
International Standard Serial Number (ISSN)
0739-5159
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2010 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Oct 2010
