A Study of a Measurement and Simulation Method on ESD Noise Causing Soft-Errors by Disturbing Signals
Abstract
A methodology to measure and simulate ESD induced noise on active IC Pins is introduced. A simple experimental setup injects ESD noise from an ESD generator and captures the waveforms. Secondly, the waveforms are simulated using a combination of 3D simulation and SPICE modeling.
Recommended Citation
J. Lee et al., "A Study of a Measurement and Simulation Method on ESD Noise Causing Soft-Errors by Disturbing Signals," Proceedings of the 33rd Electrical Overstress/Electrostatic Discharge Symposium (2011, Anaheim, CA), Institute of Electrical and Electronics Engineers (IEEE), Sep 2011.
Meeting Name
33rd Electrical Overstress/Electrostatic Discharge Symposium (2011: Sep. 11-16, Anaheim, CA)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
3D Simulations; Disturbing Signals; ESD Generator; Experimental Setup; IC Pins; Induced Noise; Measurement and Simulation; Soft Error; SPICE Modeling; Wave Forms; Electrostatic Discharge; Measurement Errors; SPICE; Three Dimensional; Three Dimensional Computer Graphics; Electrostatic Devices
International Standard Book Number (ISBN)
978-1585371976; 978-1-58537-193-8
International Standard Serial Number (ISSN)
0739-5159
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2011 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Sep 2011
