Abstract
A domino logic test circuit includes a dynamic node, a precharge device for charging the dynamic node, and an output inverter for inverting an output of the dynamic node. A logic network is coupled to the dynamic node for discharging the dynamic node in accordance with logic. A footer device enables and disables the logic network. A keeper device is coupled to the dynamic node for retaining a charge state of the dynamic node while awaiting the logic network to operate in accordance with the logic. A test mode selection device is coupled to the dynamic node and is configured to enable a latch in the test mode. A phase selection device is configured to receive at least a wait signal and to enable selection of at least a precharge phase for charging the dynamic node to a voltage level, a write phase for generating a value to the latch based on the logic and the voltage level of the dynamic node, and a wait phase for enabling reading the value. The selection is based, at least partially, on the wait signal state.
Recommended Citation
W. K. Al-Assadi and P. Chandrasekhar, "Domino Logic Testing Systems and Methods," U.S. Patents, Feb 2008.
Department(s)
Electrical and Computer Engineering
Patent Application Number
US11/426,278
Patent Number
US7332938B2
Document Type
Patent
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2008 The Curators of the University of Missouri, All rights reserved.
Publication Date
19 Feb 2008
