Modeling of Multiple Vias with a Shared Anti-Pad in an Irregular Plate Pair using Domain Decomposition Approach
An irregular plate pair with multiple vias sharing an anti-pad is decomposed into top/bottom plate-thickness domain and parallel-plate domain whose admittance matrices are calculated by three-dimensional (3D) finite element method (FEM) and hybrid 3D/2D FEM. Combined admittance matrix algorithm is used to obtain the final admittance matrix of the plate pair including finite thickness plates. The widely-used assumption of transverse electromagnetic (TEM) modes on anti-pads is carefully investigated by comparing the combined admittance matrix algorithm with hybrid 3D/2D FEM. It is found that higher-order modes are excited on anti-pads and in practical printed circuit board, the higher-order modes can penetrate from one layer of plate pair to another layer. This may provide guidance for future research for multiple vias in a shared anti-pad.
Y. Zhang et al., "Modeling of Multiple Vias with a Shared Anti-Pad in an Irregular Plate Pair using Domain Decomposition Approach," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2014, Raleigh, NC), pp. 265 - 270, Institute of Electrical and Electronics Engineers (IEEE), Aug 2014.
The definitive version is available at https://doi.org/10.1109/ISEMC.2014.6898982
2014 IEEE International Symposium on Electromagnetic Compatibility (2014: Aug. 4-8, Raleigh, NC)
Electrical and Computer Engineering
Center for High Performance Computing Research
Second Research Center/Lab
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Domain decomposition methods; Electromagnetic compatibility; Printed circuit boards; Printed circuits; Admittance matrices; Domain decompositions; Finite thickness plates; Higher-order modes; Parallel plates; Provide guidances; Three dimensional (3 D) finite element methods (FEM); Transverse electromagnetic mode; Finite element method
International Standard Serial Number (ISSN)
Article - Conference proceedings
© 2014 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
08 Aug 2014