Designing Test Patterns for Effective Measurement of Typical TSV Pairs in a Silicon Interposer
In this paper, practical test patterns are designed to calculate the characteristics of Through-Silicon Via (TSV) pairs in a silicon interposer. Proposed test patterns include probing pads, traces and TSVs, which are modeled by a combination of impedances and admittances. Performance of the test patterns is obtained from simulation models built in full wave simulation solver. TSV response is then obtained by de-embedding the pad and trace from the test patterns. The TSV response is also verified by analytical TSV characterization and full wave simulation results for only TSV structures. Thus the paper provides a guide to design feasible test structures from which true response of a TSV pair can be derived.
Q. Wang et al., "Designing Test Patterns for Effective Measurement of Typical TSV Pairs in a Silicon Interposer," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2014, Tokyo, Japan), pp. 382 - 385, Institute of Electrical and Electronics Engineers (IEEE), Dec 2014.
2014 International Symposium on Electromagnetic CompatibiIity, EMC 2014 (2014: May 12-16, Tokyo, Japan)
Electrical and Computer Engineering
Center for High Performance Computing Research
Second Research Center/Lab
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Electromagnetic compatibility; Electronics packaging; Integrated circuit interconnects; Integrated circuit manufacture; Silicon; analytical; De-embedding; Full-wave simulations; Practical tests; Silicon interposers; Test structure; Through-Silicon-Via (TSV); TSV; Three dimensional integrated circuits
International Standard Book Number (ISBN)
International Standard Serial Number (ISSN)
Article - Conference proceedings
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01 Dec 2014