Analysis and Modeling of Substrate Noise in Domino CMOS Circuits
Abstract
With the increasing need for high speed performance circuits, Domino CMOS circuits are preferred over their static counterparts. However the vulnerability of Domino CMOS logic to noise limits the Domino circuits applications. Moreover, with the decrease in the feature size and with the various circuits sharing the same die, the substrate coupling issues cannot be neglected. This paper describes the effects of the substrate noise on the performance of the Domino CMOS circuits and describes the effects of substrate noise when the operating frequency approaches the higher frequency range (above 10GHz).
Recommended Citation
W. K. Al-Assadi et al., "Analysis and Modeling of Substrate Noise in Domino CMOS Circuits," Proceedings of the 2008 International Conference on Computer Design (2008, Las Vegas, NV), Jul 2008.
Meeting Name
2008 International Conference on Computer Design, CDES 2008 (2008: Jul. 14-17, Las Vegas, NV)
Department(s)
Electrical and Computer Engineering
Second Department
Engineering Management and Systems Engineering
Keywords and Phrases
CMOS Domino; Monte Carlo Simulation; Capacitive Coupling; Substrate Noise
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Publication Date
17 Jul 2008
