Surface mount technology (SMT) ferrite beads are often used in high-speed digital circuit designs to mitigate noise. The common modeling approach is to include SMT ferrite beads as equivalent lumped LCR circuits. The work presented in this paper included SMT ferrite beads as a frequency-dependent impedance in a PEEC-like modeling tool denoted CEMPIE, a circuit extraction approach based on a mixed-potential integral equation formulation. Agreement with measurements demonstrates the approach. The applications shown are segmentation of power areas for noise isolation, and I/O line filtering.
J. Fan et al., "Including SMT Ferrite Beads in DC Power Bus and High-Speed I/O Line Modeling," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2001, Montreal, Quebec), vol. 1, pp. 336-339, Institute of Electrical and Electronics Engineers (IEEE), Aug 2001.
The definitive version is available at https://doi.org/10.1109/ISEMC.2001.950655
IEEE International Symposium on Electromagnetic Compatibility (2001: Aug. 13-17, Montreal, Quebec)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
CEMPIE; DC Power Bus; EMC; PCB Design; PEEC-Like Modeling Tool; SMT Ferrite Beads; Circuit Extraction Approach; Digital Circuits; Electromagnetic Compatibility; Equivalent Lumped LCR Circuits; Ferrites; Frequency-Dependent Impedance; High-Speed I/O Line Modeling; High-Speed Digital Circuit Design; Interference Suppression; Mixed-Potential Integral Equation Formulation; Noise Isolation; Noise Mitigation; Partial Element Equivalent Circuit Method; Power Areas Segmentation; Printed Circuit Design; Surface Mount Technology
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Article - Conference proceedings
© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Aug 2001