Stacked-card and modules-on-backplane printed circuit-board geometries are advantageous for conserving real-estate in many designs. Unfortunately, at high frequencies, electromagnetic magnetic interference (EMI) resulting from the nonnegligible impedance of the signal return at the connector may occur. This effective EMI coupling path results in the daughtercard being driven against the motherboard and attached cables, resulting in common-mode radiation. The connector geometry can be modified to minimize the EMI coupling path when high frequencies are routed between the motherboard and daughtercard. Current speeds and printed circuit board (PCB) sizes result in geometries that are of significant dimensions in terms of a wavelength at the upper frequency end of the signal spectrum. The PCB geometries are then of sufficient electrical extent to be effective EMI antennas. The resonant lengths of the EMI antennas may, however, be quite removed from the typical half-wavelength dipole resonances. The finite difference time-domain method can be used to numerically analyze the printed circuit board geometries, determine antenna resonances, and investigate EMI coupling paths. EMI resulting from the stacked-card configuration has been investigated experimentally and numerically to ascertain the EMI coupling path at the bus connector, and EMI antennas.


Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory


National Science Foundation (U.S.)
United States. Department of Defense


This work was supported in part by an NSF Graduate Fellowship, Department of Defense MURI Contract DAAG55-97-1-0014, and the EMC Consortium at the University of Missouri-Rolla.

Keywords and Phrases

EMI; EMI Antennas; EMI Coupling Path; FDTD; PCB Size; Antenna Resonances; Antennas; Bus Connector; Cables; Common-Mode Radiation; Connector Geometry; Daughtercard; Electric Connectors; Electromagnetic Coupling; Electromagnetic Magnetic Interference; Finite Difference Time-Domain Analysis; Finite Difference Time-Domain Method; High Frequencies; Modules-On-Backplane; Motherboard; Printed Circuit-Board Geometries; Printed Circuits; Resonance; Resonant Lengths; Signal Return; Signal Spectrum; Stacked-Card PCB Configurations; System Buses; Wavelength; Electromagnetic Interference (EMI); Finite Difference Time Domain (FDTD) Methods; Impedance Measurement; Poles; Printed Circuit Layout; Zeros

International Standard Serial Number (ISSN)

0018-9375; 1558-187X

Document Type

Article - Journal

Document Version

Final Version

File Type





© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Feb 2001