Nowdays the fast and increased demand for bandwidth in the telecommunication world translates into the design of complex boards exchanging data at high bit rate in reduced design cycle. Sometimes it is impossible to spent time in setting pre-layout simulations, because they are not compatible with the design time schedule. In this scenario it is better to design the boards using experience and then make simulations in conjunction with measurements, using customized numerical tools which don't need complex models.
V. Ricchiuti et al., "Characterization of Serial Links at 5.5Gbps on FR4 Backplanes," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility: EMC Europe (2008, Hamburg, Germany), Institute of Electrical and Electronics Engineers (IEEE), Sep 2008.
The definitive version is available at https://doi.org/10.1109/EMCEUROPE.2008.4786852
IEEE International Symposium on Electromagnetic Compatibility: EMC Europe (2008: Sep. 8-12, Hamburg, Germany)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Dielectric Losses; Differential Serial Link; Frequency Domain Measurements; Printed Circuit Board; Time Domain Measurements; Backplanes; Complex Models; Design Cycles; Design Time; Differential Serial Link; Frequency Domain Measurements; High Bit Rates; Numerical Tools; Bandwidth; Ceramic Capacitors; Design; Dielectric Devices; Dielectric Losses; Electric Inverters; Electromagnetic Compatibility; Electromagnetic Wave Emission; Frequency Domain Analysis; Plastic Molds; Printed Circuit Manufacture; Telecommunication Systems; Printed Circuit Boards
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Article - Conference proceedings
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Sep 2008