An efficient numerical approach based on the 2-D finite-difference time-domain (FDTD) method is proposed to model the power/ground plane noise or simultaneously switching noise (SSN), including the interconnect effect between the package and the print circuit board (PCB). The space between the power and ground planes on the package and PCB are meshed with 2-D cells. The equivalent R-L-C circuits of the via and the solder balls connecting the package and PCB can be incorporated into a 2-D Yee cell based on a novel integral formulation in the time domain. An efficient recursive updating algorithm is proposed to fit the lumped networks into the Yee equations. A test sample of a ball grid array (BGA) package mounted on a PCB was fabricated. The power/ground noise coupling behavior was measured and compared with the simulation. The proposed method significantly reduces the computing time compared with other full-wave numerical approaches.


Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory


National Science Council (Republic of China)


This work was supported by the National Science Council, Taiwan, R.O.C., under Grant NSC 93-2213-E-110-010.

Keywords and Phrases

2D FDTD; 2D Finite-Difference Time-Domain Method; Ball Grid Array Package; Ball Grid Arrays; Circuit Noise; Equivalent RLC Circuits; Finite Difference Time-Domain Analysis; Interconnect Effect; Lumped Element Method; Lumped Parameter Networks; Noise Coupling; Package-PCB Power/Ground Planes; Power/Ground Plane Noise; Printed Circuits; Signal Integrity (SI); Two-Dimensional (2-D) Finite-Difference Time-Domain (FDTD) Modeling; Ball Grid Array (BGA); Print Circuit Board (PCB); Simultaneous Switching Noise (SSN)

International Standard Serial Number (ISSN)

1521-3323; 1557-9980

Document Type

Article - Journal

Document Version

Final Version

File Type





© 2007 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Nov 2007