Automated Translation of Digital Logic Equations into Optimized VHDL code

Author

John Evan Stark
George Winston Zobrist, Missouri University of Science and Technology

Abstract

It was desired to develop an algorithm for the automated translation of finite slate machines from state table form to optimized VHDL form. To do this, algorithms arc needed for reducing the state machine to simplest form, making state assignments, producing minimal logic equations to represent the state machine, and producing VHDL code which describes the intended circuit. Various such algorithms were examined and a prototype program written to perform this translation.

Recommended Citation

Stark, John Evan and Zobrist, George Winston, "Automated Translation of Digital Logic Equations into Optimized VHDL code" (1989). Computer Science Technical Reports. 70.
https://scholarsmine.mst.edu/comsci_techreports/70

Department(s)

Computer Science

Comments

This report is substantially the M.S. thesis of the first author, completed May, 1989.

Report Number

CSc-89-2

Document Type

Technical Report

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 1989 University of Missouri--Rolla, All rights reserved.

Publication Date

May 1989