Missouri S&T Scholar's Mine Research RepositoryMissouri S&T Research
print 
Title: Susceptibility scanning as failure analysis tool for system-level electrostatic discharge (ESD) problems
Author (s): Giorgi, Muchaidze
Koo, Jayong
Cai, Qing
Li, Tun
Han, Lijun
Martwick, Andrew
Wang, Kai
Min, Jin
Drewniak, James L.
Pommerenke, David
Department/Lab Affiliations: Electrical and Computer Engineering
Electromagnetic Compatibility Laboratory
Materials Research Center
Materials Science & Engineering
Keywords: electrostatic discharges (ESDs)
scanning
susceptibility
Subject Terms: Immunity.
Issue Date: 2008-05
Publisher: Institute of Electrical and Electronics Engineers IEEE
Citation: Muchaidze, Giorgi, Jayong Koo, Qing Cai, Tun Li, Lijun Han, Andrew Martwick, Kai Wang, Jin Min, James L. Drewniak, and David Pommerenke. “Susceptibility scanning as failure analysis tool for system-level electrostatic discharge (ESD) problems”, IEEE Transactions on Electromagnetic Compatibility, vol. 50, no. 2, pp. 268-276, 2007.
Abstract: Susceptibility scanning is an increasingly adopted method for root cause analysis of system-level immunity sensitivities. It allows localizing affected nets and integrated circuits (ICs). Further, it can be used to compare the immunity of functionally identical or similar ICs or circuit boards. This paper explains the methodology as applied to electrostatic discharge and provides examples of scan maps and signals probed during immunity scanning. Limitations of present immunity analysis methods are discussed.
Type: Article - Journal
text
In Title: IEEE Transactions on Electromagnetic Compatibility
Copyright Notice: This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
allows publisher's final version to be uploaded
FULL COPYRIGHT INFORMATION:
http://www.ieee.org/portal/cms_docs_iportals/iportals/publications/rights/downloads/IEEECForm121302pdf.pdf
http://www.ieee.org/web/publications/rights/index.html
http://www.ieee.org/web/publications/rights/policies.html
Publisher URL:
http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4527042&arnumber=4510843&count=38&index=8
Link to this page:
http://scholarsmine.mst.edu/post_prints/SusceptibilityScanningAsFailureAnalysisToolForSys_09007dcc8052614c.html
Full Text:
SusceptibilityScanningAsAFailureAnalysis_09007dcc8052621d.pdf



titleSusceptibility scanning as failure analysis tool for system-level electrostatic discharge (ESD) problems
contributor.authorGiorgi, Muchaidze
contributor.authorKoo, Jayong
contributor.authorCai, Qing
contributor.authorLi, Tun
contributor.authorHan, Lijun
contributor.authorMartwick, Andrew
contributor.authorWang, Kai
contributor.authorMin, Jin
contributor.authorDrewniak, James L.
contributor.authorPommerenke, David
contributor.deptlabElectrical and Computer Engineering
contributor.deptlabElectromagnetic Compatibility Laboratory
contributor.deptlabMaterials Research Center
contributor.deptlabMaterials Science & Engineering
subjectelectrostatic discharges (ESDs)
subjectscanning
subjectsusceptibility
subject.LCSHImmunity.
date.issued2008-05
publisherInstitute of Electrical and Electronics Engineers IEEE
identifier.citationMuchaidze, Giorgi, Jayong Koo, Qing Cai, Tun Li, Lijun Han, Andrew Martwick, Kai Wang, Jin Min, James L. Drewniak, and David Pommerenke. “Susceptibility scanning as failure analysis tool for system-level electrostatic discharge (ESD) problems”, IEEE Transactions on Electromagnetic Compatibility, vol. 50, no. 2, pp. 268-276, 2007.
identifier.pub.URI
http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=4527042&arnumber=4510843&count=38&index=8
description.abstractSusceptibility scanning is an increasingly adopted method for root cause analysis of system-level immunity sensitivities. It allows localizing affected nets and integrated circuits (ICs). Further, it can be used to compare the immunity of functionally identical or similar ICs or circuit boards. This paper explains the methodology as applied to electrostatic discharge and provides examples of scan maps and signals probed during immunity scanning. Limitations of present immunity analysis methods are discussed.
typeArticle - Journal
type.DCMITypetext
type.statusFinal version
relation.isPartOfIEEE Transactions on Electromagnetic Compatibility
rightsThis material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.
rightsallows publisher's final version to be uploaded
rights.URI
http://www.ieee.org/portal/cms_docs_iportals/iportals/publications/rights/downloads/IEEECForm121302pdf.pdf
rights.URI
http://www.ieee.org/web/publications/rights/index.html
rights.URI
http://www.ieee.org/web/publications/rights/policies.html
date.accessioned2008-06-25T21:31:50Z
date.available2008-06-30T21:12:22Z
identifier.persist.URI
http://scholarsmine.mst.edu/post_prints/SusceptibilityScanningAsFailureAnalysisToolForSys_09007dcc8052614c.html
Full Text
SusceptibilityScanningAsAFailureAnalysis_09007dcc8052621d.pdf