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| Title: | 43 Gb/s decision circuits in InP DHBT technology | |
| Author (s): | Krishnamurthy, K. Chow, J. Mensa, D. Pullela, R. | |
| Department/Lab Affiliations: | Mechanical & Aerospace Engineering | |
| Keywords: | 150 GHz 180 GHz 43.2 Gbit/s 50 GHz DHBT technology III-V semiconductors InP bipolar MIMIC clock phase margin decision circuits flip-flops frequency dividers front-end circuits high-speed integrated circuits indium compounds integrated circuit layout integrated circuit packaging optical communication systems packaged master-slave D-flip-flops pseudo random binary sequence retimer static frequency dividers | |
| Issue Date: | 2004 | |
| Publisher: | Institute of Electrical and Electronics Engineers | |
| Citation: | Krishnamurthy, K.; Chow, J.; Mensa, D.; Pullela, R., "43 Gbs decision circuits in InP DHBT technology," IEEE Microwave and Wireless Components Letters, Vol.14, Iss.1, Jan. 2004 Pages: 28- 30 | |
| Abstract: | Packaged master-slave D-flip-flops designed in InP DHBT technology with 150 GHz ft and 180 GHz fmax are presented. Measurement results using a 43.2 Gb/s nonreturn to zero (NRZ), pseudo random binary sequence (PRBS) data (generated from 4 channels of 10.8 Gb/s, 2^31-1, PRBS data) and a 43.2 GHz clock, show a clock phase margin of 190/spl deg/. 2:1 Static frequency dividers designed using the D-flip-flops have been tested up to 50 GHz and show normal operation. These circuits are key building blocks in numerous front-end circuits used for 40 Gb/s optical communication systems. | |
| Type: | Article - Journal text | |
| Copyright Notice: | This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. FULL COPYRIGHT INFORMATION: | |
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| title | 43 Gb/s decision circuits in InP DHBT technology | |
| contributor.author | Krishnamurthy, K. | |
| contributor.author | Chow, J. | |
| contributor.author | Mensa, D. | |
| contributor.author | Pullela, R. | |
| contributor.deptlab | Mechanical & Aerospace Engineering | |
| subject | 150 GHz | |
| subject | 180 GHz | |
| subject | 43.2 Gbit/s | |
| subject | 50 GHz | |
| subject | DHBT technology | |
| subject | III-V semiconductors | |
| subject | InP | |
| subject | bipolar MIMIC | |
| subject | clock phase margin | |
| subject | decision circuits | |
| subject | flip-flops | |
| subject | frequency dividers | |
| subject | front-end circuits | |
| subject | high-speed integrated circuits | |
| subject | indium compounds | |
| subject | integrated circuit layout | |
| subject | integrated circuit packaging | |
| subject | optical communication systems | |
| subject | packaged master-slave D-flip-flops | |
| subject | pseudo random binary sequence | |
| subject | retimer | |
| subject | static frequency dividers | |
| date.issued | 2004 | |
| date.submitted | 2007 | |
| publisher | Institute of Electrical and Electronics Engineers | |
| identifier.citation | Krishnamurthy, K.; Chow, J.; Mensa, D.; Pullela, R., "43 Gbs decision circuits in InP DHBT technology," IEEE Microwave and Wireless Components Letters, Vol.14, Iss.1, Jan. 2004 Pages: 28- 30 | |
| identifier.issn | 1531-1309 | |
| identifier.pub.URI | ||
| description.abstract | Packaged master-slave D-flip-flops designed in InP DHBT technology with 150 GHz ft and 180 GHz fmax are presented. Measurement results using a 43.2 Gb/s nonreturn to zero (NRZ), pseudo random binary sequence (PRBS) data (generated from 4 channels of 10.8 Gb/s, 2^31-1, PRBS data) and a 43.2 GHz clock, show a clock phase margin of 190/spl deg/. 2:1 Static frequency dividers designed using the D-flip-flops have been tested up to 50 GHz and show normal operation. These circuits are key building blocks in numerous front-end circuits used for 40 Gb/s optical communication systems. | |
| type | Article - Journal | |
| type.DCMIType | text | |
| type.status | Final version | |
| rights | This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. | |
| rights.URI | ||
| date.accessioned | 2007-04-05T14:18:57Z | |
| date.available | 2007-04-05T14:18:57Z | |
| identifier.persist.URI | ||
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