"Yau and Tang have designed universal logic circuits (ULC's) of three variables with 8 I/O pins. They assumed that only one variable was available as a free input variable in its true and complementary form, the others were available as fixed input variables and the circuit generated true and complementary outputs. Their design required 22 I/O pins for a four-variable ULC, constructed from three variables ULCs. This paper decrived [sic] an algorithm for determining the input-pin connections, directly from the K-map of a given output function, for any n-variable ULC. Forslund and Waxman have designed a three-variable ULC using the theory of equivalence classes. They assumed that all the variables and their complements were available as inputs, and that they generated true and complementary outputs. With this assumption they required 7 I/O pins for a ULC of three variables. Using the same theory and assumptions as stated above, this paper describes the design of four-variable ULC from three-variable ULCs. This paper also describes the development of the circuit for realizing any n-variable function"--Abstract, page ii.
Szygenda, Stephen A.
Ho, C. Y. (Chung You), 1933-1988
Tracey, James H.
Electrical and Computer Engineering
M.S. in Electrical Engineering
University of Missouri--Rolla
vi, 47 pages
© 1969 Mahendrakumar Punjalal Shah, All rights reserved.
Thesis - Open Access
Library of Congress Subject Headings
Logic circuits -- Design
Equivalence classes (Set theory)
Print OCLC #
Electronic OCLC #
Link to Catalog Recordhttp://laurel.lso.missouri.edu/record=b1067216~S5
Shah, Mahendrakumar Punjalal, "Design and use of a universal logic circuit" (1969). Masters Theses. 7017.