Masters Theses

Alternative Title

Time domain thru reflect line (TRL) calibration error assessment and its mitigation
Modeling of multilayer printed circuit boards (PCB) with complex area fills

Abstract

"Part 1 for this thesis is on the error assessment of a time-domain (t-TRL) calibration technique. Application of the "Thru-Reflect-Line" (TRL) calibration to time-domain measurements of S-parameters (t-TRL) can be used for the characterization of the printed circuit boards (PCBs). However, t-TRL calibrated results still have deviations from the reference frequency-domain vector network analyzer (VNA) calibrated results. There are two main sources of errors in the t-TRL calibration. They are random errors, such as an additive noise and jitter, and systematic errors associated with cables, connectors, and port mismatches. This work addresses these two types of errors by proper selection of the number of sampling points, waveform averages, and time record. Methods tried out to eliminate or reduce these errors are detailed in this work. Measurements and simulations were performed for implementing these methods, and the results are explained. A t-TRL calibration automation tool based on TDR/TDT measurements has been developed. Part 2 of this thesis is on the modeling of multilayer PCBs with complex area fills and floating planes. Noise on the power distribution network (PDN) and between the power area fills in multilayer PCBs with complex geometries is a significant concern. Modeling of such PCBs can be done with a cavity model approach. Correlation of a 3D EM solver results with the Multilayer Via Transition Tool (MVTT) results based on cavity model is explained here. Additional modeling and validation was done using the equivalent inductance method"--Abstract, page iii.

Advisor(s)

Drewniak, James L.

Committee Member(s)

Fan, Jun, 1971-
Pommerenke, David

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Sponsor(s)

Cisco Systems, Inc.

Publisher

Missouri University of Science and Technology

Publication Date

Summer 2010

Pagination

xi, 98 pages

Rights

© 2010 Vysakh Sivarajan, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Library of Congress Subject Headings

Data transmission systems
Electric power distribution -- Design
Printed circuits -- Calibration
Time-domain analysis

Thesis Number

T 9687

Print OCLC #

689175509

Electronic OCLC #

656846931

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