Masters Theses

Alternative Title

Defect tolerance and testing for configurable nano crossbars

Keywords and Phrases

NanoFabric

Abstract

"Moore's Law speculated a trend in computation technology in terms of number of transistors per unit area that would double roughly every two years. Even after 40 years of this prediction, current technologies have been following it successfully. There are however, certain physical limitations of current CMOS that would result in fundamental obstructions to continuation of Moore's Law. Although there is a debate amongst experts on how much time it would take for this to happen, it is certain that some entirely new paradigms for semiconductor electronics would be needed to replace CMOS and to delay the end of Moore's Law. Silicon nanowires (SiNW) and Carbon nanotubes (CNT) possess significant promise to replace current CMOS"--Abstract, page iv.

Advisor(s)

Al-Assadi, Waleed K.

Committee Member(s)

Choi, Minsu
McCracken, Theodore E.
Smith, Scott C.

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Computer Engineering

Publisher

Missouri University of Science and Technology

Publication Date

Spring 2008

Journal article titles appearing in thesis/dissertation

  • BIST approach for configurable nanofabric arrays
  • Nanofabric PLA architecture with redundancy enhancement

Pagination

ix, 41 pages

Note about bibliography

Includes bibliographical references (page 56) and index (pages 57-58).

Rights

© 2008 Mandar Vijay Joshi, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Library of Congress Subject Headings

Fault-tolerant computing
Integrated circuits -- Fault tolerance
Nanostructured materials
Nanotechnology

Thesis Number

T 9345

Print OCLC #

260055420

Electronic OCLC #

217308292

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