Analysis and modeling of crosstalk noise and testability in Domino CMOS logic circuits
"Domino CMOS logic offers designers the advantage of most influential circuit design parameters such as speed, higher integration density, and lower power dissipation. As a result a common practice has become to use the Domino CMOS in high performance integrated circuits. However, along with these positives comes inherently low crosstalk noise immunity. The noise immunity of Domino CMOS logic continues to reduce as the recent trends in integrated circuit technology are constantly followed...This thesis proposes analytical and statistical models for crosstalk noise in Domino CMOS logic circuits"--Abstract, leaf iii.
Al-Assadi, Waleed K.
Smith, Scott C.
Electrical and Computer Engineering
M.S. in Computer Engineering
University of Missouri--Rolla
ix, 89 leaves
© 2007 Vipin Sharma, All rights reserved.
Thesis - Citation
Library of Congress Subject Headings
Crosstalk -- Prevention
Electronic circuits -- Noise
Metal oxide semiconductors, Complementary
Print OCLC #
Link to Catalog Record
Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.http://laurel.lso.missouri.edu/record=b5999201~S5
Sharma, Vipin, "Analysis and modeling of crosstalk noise and testability in Domino CMOS logic circuits" (2007). Masters Theses. 5978.