Microcontroller ESD immunity test and on-chip power distribution network analysis
Keywords and Phrases
Electrical fast transient (EFT); PSpice simulation
"Current semiconductor process technology makes the microcontroller sensitive to fast rise time transients. To ensure transient immunity in the design stage, there is significant interest in understanding the failure mechanisms of the microcontroller to electrostatic discharge (ESD) or electrical fast transient (EFT) events. This thesis documents the immunity test performed on an 8-bit microcontroller. The test was conducted by injecting transient currents onto the package pins through a capacitive probe. The procedure used to detect soft errors is described and corresponding test results of the microcontroller reactions to transients with different rise times and polarities are reported, which includes three highly sensitive pins, general I/O pins and power/ground pins"--Abstract, leaf iii.
Beetner, Daryl G.
Drewniak, James L.
Electrical and Computer Engineering
M.S. in Electrical Engineering
University of Missouri--Rolla
Journal article titles appearing in thesis/dissertation
- Experimental investigation of the ESD sensitivity of an 8-bit microcontroller
- ESD induced noise coupling and IC PDN modeling
xi, 78 leaves
© 2007 Lijun Han, All rights reserved.
Thesis - Citation
Library of Congress Subject Headings
Electric discharges -- Detection
Electric power distribution
Print OCLC #
Link to Catalog Record
Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.http://laurel.lso.missouri.edu/record=b6431035~S5
Han, Lijun, "Microcontroller ESD immunity test and on-chip power distribution network analysis" (2007). Masters Theses. 5956.