Keywords and Phrases
NULL Convention Logic
"This thesis focuses on designing generic quad-rail arithmetic circuits, such as signed and unsigned multipliers and Multiply and Accumulate (MAC) units, using the asynchronous delay-insensitive NULL Convention Logic (NCL) paradigm. This work helps to build a library of reusable components to be used for automated NCL circuit synthesis, which will aid in the integration of asynchronous design paradigms into the semiconductor industry"--Abstract, page iii.
Smith, Scott C.
Al-Assadi, Waleed K.
Beetner, Daryl G.
Electrical and Computer Engineering
M.S. in Computer Engineering
National Science Foundation (U.S.)
University of Missouri--Rolla
ix, 68 pages
© 2007 Samarsen Reddy Mallepalli, All rights reserved.
Thesis - Open Access
Library of Congress Subject Headings
Asynchronous circuits -- Design and construction
Electronic circuit design
Logic circuits -- Design and construction
Print OCLC #
Electronic OCLC #
Link to Catalog Recordhttp://laurel.lso.missouri.edu/record=b6400724~S5
Mallepalli, Samarsen Reddy, "Generic algorithms and NULL Convention Logic hardware implementation for unsigned and signed quad-rail multiplication" (2007). Masters Theses. 4565.