Masters Theses

Title

A Hardware-In-Loop test bed for WIMAX downlink baseband processing using Simulink and field programmable gate arrays

Alternative Title

Hardware In Loop test bed for WIMAX baseband processing using Simulink and field programmable gate arrays

Advisor(s)

Zheng, Y. Rosa

Committee Member(s)

Beetner, Daryl G.
Al-Assadi, Waleed K.

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

Missouri University of Science and Technology

Publication Date

Fall 2008

Journal article titles appearing in thesis/dissertation

  • Hardware-In-Loop transceiver test bed processing using Simulink and FPGA
  • DSP curriculum development for computer engineering using Altera's DE2 FPGA kits

Pagination

x, 59 leaves

Rights

© 2008 Sarat Kumar Chitneni, All rights reserved.

Document Type

Thesis - Citation

File Type

text

Language

English

Library of Congress Subject Headings

Broadband communication systems
Field programmable gate arrays
IEEE 802.16 (Standard)
SIMULINK
Wireless communication systems

Thesis Number

T 9429

Print OCLC #

313477338

Link to Catalog Record

Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.

http://laurel.lso.missouri.edu/record=b6661265~S5

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