Design and characterization of asynchronous delay-insensitive arithmetic components using NULL conventional logic
Keywords and Phrases
NULL Convention Logic (NCL)
"This thesis focuses on design and characterization of arithemetic circuits, such as multipliers and ALUs, using the asynchronous delay-insensitive NULL Convention Logic (NCL) paradigm. This work helps to build a library of reusable components to aid in the integration of asynchronous design paradigms, like NCL, into the semiconductor design industry."--Abstract, page iii.
Electrical and Computer Engineering
M.S. in Computer Engineering
University of Missouri--Rolla
x, 67 leaves
© 2003 Satish Kumar Bandapati, All rights reserved.
Thesis - Citation
Library of Congress Subject Headings
Computer arithmetic and logic units
Print OCLC #
Link to Catalog Record
Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.http://laurel.lso.missouri.edu/record=b5089517~S5
Bandapati, Satish K., "Design and characterization of asynchronous delay-insensitive arithmetic components using NULL conventional logic" (2003). Masters Theses. 2449.