Masters Theses

Title

Design and implementation of boundary scan with built-in self-test for Xilinx's XC4000 Logic Cell Array Family of Field Programmable Gate Array

Author

Chien-Yuh Lin

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

University of Missouri--Rolla

Publication Date

Fall 1994

Pagination

ix, 62 pages

Rights

© 1994 Chien-Yuh Lin, All rights reserved.

Document Type

Thesis - Citation

File Type

text

Language

English

Thesis Number

T 6882

Print OCLC #

32799256

Link to Catalog Record

Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.

http://laurel.lso.missouri.edu/record=b2703104~S5

This document is currently not available here.

Share My Thesis If you are the author of this work and would like to grant permission to make it openly accessible to all, please click the button above.

Share

 
COinS