Experimental Evaluation of Power Bus Decoupling on a 4-Layer Printed Circuit Board

Juan Chen
James L. Drewniak, Missouri University of Science and Technology
Richard E. DuBroff, Missouri University of Science and Technology
Todd H. Hubing, Missouri University of Science and Technology
Minjia Xu
Thomas Van Doren, Missouri University of Science and Technology

This document has been relocated to http://scholarsmine.mst.edu/ele_comeng_facwork/1037

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Abstract

The switching of active devices on printed circuit boards (PCBs) can cause a momentary surge or drop in the power bus voltage. Decoupling capacitors are often utilized to alleviate this problem. They help to stabilize the power bus voltage by supplying transient current to active devices. The decoupling strategy, including where to place the high-frequency decoupling capacitors, is often a topic of debate. This paper examines the effect of decoupling capacitor placement on a 4-layer printed circuit board. Some design guidelines are provided.