Development of a FACTS Real-Time Hardware-in-the-Loop Simulation
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Abstract
This paper describes an approach to simulate the bulk power transmission system using hardware-in-the-loop (HIL) FACTS devices. The architecture of the HIL simulation is described and a DSP-PC-based UPFC device designed for HIL simulation is presented. The implementation of UPFC hardware, software and basic control are discussed. Experimental results are provided to support the proposed concept.
This paper has been withdrawn.
