Interleaving PWM waveforms is a proven method to reduce ripple in dc-dc converters. The present work explores interleaving for three-phase motor drives. Fourier analysis shows that interleaving the carriers in conventional uniform PWM significantly reduces the common-mode voltage. New DSP hardware supports interleaving directly with changes to just two registers at setup time, so no additional computation time is needed during operation. The common-mode voltage reduction ranges from 36% at full modulation to 67% when idling with zero modulation. Third harmonic injection slightly reduces the advantage (to 26% at full modulation). However, the maximum RMS common-mode voltage is still less than 20% of the bus voltage under all conditions. Low-voltage experimental results support the findings.
J. W. Kimball and M. J. Zawodniok, "Reducing Common-Mode Voltage in Three-Phase Sine-Triangle PWM with Interleaved Carriers," Proceedings of the 25th Annual IEEE Applied Power Electronics Conference and Exposition, 2010, Institute of Electrical and Electronics Engineers (IEEE), Feb 2010.
The definitive version is available at http://dx.doi.org/10.1109/APEC.2010.5433431
25th Annual IEEE Applied Power Electronics Conference and Exposition, 2010
Electrical and Computer Engineering
ITW Military GSE
National Science Foundation (U.S.)
Keywords and Phrases
DC-DC Power Convertors; PWM Power Convertors; Digital Signal Processing Chips; Fourier analysis
Article - Conference proceedings
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