Title

An Adaptive VLSI Neural Network Chip

Abstract

Presents an adaptive neural network, which uses multiplying-digital-to-analog converters (MDACs) as synaptic weights. The chip takes advantage of digital processing to learn weights, but retains the parallel asynchronous behavior of analog systems, since part of the neuron functions are analog. The authors use MDAC units of 6 bit accuracy for this chip. Hebbian learning is employed, which is very attractive for electronic neural networks since it only uses local information in adapting weights.

Meeting Name

1994 IEEE International Conference on Neural Networks (ICNN'94)- 1st IEEE World Congress on Computational Intelligence (1994: Jun. 27-Jul. 2, Orlando, FL)

Department(s)

Electrical and Computer Engineering

International Standard Book Number (ISBN)

078031901X

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 1994 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.


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