A Decision Tree Approach for Subcircuit Extraction Problem
Abstract
The layout versus schematic (LVS) analysis is an essential part of topology design verification, and subcircuit extraction is one of the operations in the LVS testing. We provided an efficient decision tree approach to the subcircuit extraction problem based on the solution to the graph isomorphism problem. We construct the decision tree for the pattern circuit and the main circuit. And then we perform a classification process. To evaluate its performance, we compare it with the neural networks based heuristic dynamic programming algorithm (SubHDP) which is by far one of the fastest algorithms for subcircuit extraction problem.
Recommended Citation
N. Zhang and D. C. Wunsch, "A Decision Tree Approach for Subcircuit Extraction Problem," Intelligent Engineering Systems Through Artificial Neural Networks, American Society of Mechanical Engineers (ASME), Jan 2003.
Department(s)
Electrical and Computer Engineering
Sponsor(s)
Mary K. Finley Missouri Endowment
National Science Foundation (U.S.)
Keywords and Phrases
VLSI Layout Verification; Adaptive Critic Designs; Decision Tree; Layout Versus Schematic (LVS); Neural Networks
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2003 American Society of Mechanical Engineers (ASME), All rights reserved.
Publication Date
01 Jan 2003
