A Survey on Modeling Strategies for High-Speed Differential Via between Two Parallel Plates

Abstract

This paper presents a survey on physics-based modeling strategies for differential via in high-speed multilayer printed circuits (PCBs). Driven by the goals of accurate and efficient design, researchers have explored several approaches for differential via modeling, include π-type RLC circuit, differential transmission line with via-plate capacitance/effective dielectric constant and parallel plate impedance model. This survey provides overviews of these modeling strategies and comparisons by correlating mixed-mode S-parameter from HFSS. In particular, this paper then aims on building a generic parameterized and SPICE-compatible circuit model for designing differential via in a frequency range up to 40GHz.

Meeting Name

2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity, EMCSI (2017: Aug. 7-11, Washington, DC)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Sponsor(s)

Cisco Systems, Inc.
National Science Foundation (U.S.)

Comments

This paper is based upon project supported by Cisco and National Science Foundation (NSF) under Grant IIP-1440110.

Keywords and Phrases

Circuit simulation; Electromagnetic compatibility; Resonant circuits; Scattering parameters; Surveys; Differential via; Line models; Parallel plates; Physics-based modeling; Via modeling; SPICE; Parallel plates impedance; Physics based model; Tramsmission line model; Via model; Zpp

International Standard Book Number (ISBN)

978-1-5386-2229-2

International Standard Serial Number (ISSN)

1077-4076; 2158-1118

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2017 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Aug 2017

Link to Full Text

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