Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems

Abstract

Advances in field reconfigurable technology have made possible the design and implementation of highly flexible parallel multi-processor-memory systems; system reliability is often an important measure of these systems because a degradation of an individual module can unacceptably impair the reliable operation of these systems. System reliability is mainly determined by the hardware (HW) configurations (requested by the software, SW) and the process of field reconfiguration/repair (by utilizing unused processors and memory modules as spares). This is referred to as HW/SW Co-reliability. System configurations are categorized in terms of parallel processor size and processor/memory intensity as affecting the HW/SW Co-reliability. Their characteristics are discussed. A model for HW/SW Co-reliability based on a combinatorial analysis for field reconfigurable multiprocessor-memory systems is then proposed and further validated by extensive parametric simulations, thus allowing the design and implementation of highly reliable field-reconfigurable multiprocessor-memory systems.

Meeting Name

International Parallel and Distributed Processing Symposium: IPDPS (2002: Apr. 15-19, Ft. Lauderdale, FL)

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Field Reconfiguration; HW/SW Co-Reliability; Modular Redundancy; Multi-Processor-Memory System; Multiprocessing Systems; Redundancy; Reliability; Degradation; Distributed Processing; Fault Detection; Computer Science; Electric Variables Measurement; Hardware; Analytical Models

International Standard Book Number (ISBN)

978-0769515731

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2002 IEEE Computer Society, All rights reserved.

Publication Date

01 Apr 2002

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