Finding the Root Cause of an ESD Upset Event

Abstract

System level Electrostatic Discharges (ESD) can lead to soft-errors (e.g., bit-errors, wrong resets etc.). By this talk we try to offer guidance in finding the root cause of upsets frequently observed in immunity testing (e.g., ESD, EFT). At first a description of the ESD discharge process is given. It provides the necessary background for correctly analyzing ESD failures. Local scanning and in-circuit measurement techniques are explained. Further, it is shown how PCB scanning results, revealing local sensitivities, can be used for the characterization and optimization of circuit and ICs design and software for minimizing unwanted responses to soft-error causing noise. A series of measurements of such noise voltages coupled into a sensitive trace are presented.

Meeting Name

DesignCon 2006 (2006: Feb. 6-9, Santa Clara, CA)

Department(s)

Electrical and Computer Engineering

Sponsor(s)

Intel Corporation

Keywords and Phrases

ESD; Electrostatic Discharges; Electric discharges

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2006 International Engineering Consortium, All rights reserved.

Publication Date

01 Feb 2006

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