A Study of a Measurement and Simulation Method on ESD Noise Causing Soft-Errors by Disturbing Signals
A methodology to measure and simulate ESD induced noise on active IC Pins is introduced. A simple experimental setup injects ESD noise from an ESD generator and captures the waveforms. Secondly, the waveforms are simulated using a combination of 3D simulation and SPICE modeling.
J. Lee et al., "A Study of a Measurement and Simulation Method on ESD Noise Causing Soft-Errors by Disturbing Signals," Proceedings of the 33rd Electrical Overstress/Electrostatic Discharge Symposium (2011, Anaheim, CA), Institute of Electrical and Electronics Engineers (IEEE), Sep 2011.
33rd Electrical Overstress/Electrostatic Discharge Symposium (2011: Sep. 11-16, Anaheim, CA)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
3D Simulations; Disturbing Signals; ESD Generator; Experimental Setup; IC Pins; Induced Noise; Measurement and Simulation; Soft Error; SPICE Modeling; Wave Forms; Electrostatic Discharge; Measurement Errors; SPICE; Three Dimensional; Three Dimensional Computer Graphics; Electrostatic Devices
International Standard Book Number (ISBN)
International Standard Serial Number (ISSN)
Article - Conference proceedings
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