An On-Chip Detector of Transient Stress Events

Abstract

Testing and debugging of electrostatic discharge (ESD) or electrical fast transient issues in modern electronic systems can be challenging. The following paper describes the design of an on-chip circuit that detects and stores the occurrence of a fast transient stress event at the ESD protection structures in an input/output pad. Measurements and simulations of a test chip in 90 nm technology show that this circuit can accurately detect and record the presence of a transient stress event with a peak current as low as 0.9 A or a duration as short as 1 ns, and that the detector works well across typical temperature and process variations. The small size of the detector allows it to be used effectively in low-cost commercial integrated circuits. The detector was tested in a system-level environment and successfully records transient events. The importance of simulating with intelligent approximations of the system parasitics is described and demonstrated in measurements. An improved detector is discussed, which performs better in terms of process variations.

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Sponsor(s)

National Science Foundation (U.S.)

Keywords and Phrases

Detectors; Electrical Fast Transient (EFT); Electrostatic Discharge (ESD); Electrostatic Discharges; ESD Detectors; Integrated Circuit Modeling; Latches; On-Chip Measurements; Stress; System-Level ESD; Threshold Voltage; Transient Analysis

International Standard Serial Number (ISSN)

0018-9375

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Aug 2018

Link to Full Text

Share

 
COinS