Protection of a Delay-Locked Loop from Simultaneous Switching Noise Coupling using an On-Chip Electromagnetic Bandgap Structure
An on-chip electromagnetic bandgap (EBG) structure is applied to protect a delay-locked loop (DLL) from simultaneous switching noise (SSN) coupling. The fabricated on-chip EBG structure has a low cut-off frequency of approximately 1 GHz. An accumulation-mode MOS capacitor is used to achieve a high layout efficiency for the MOS capacitor and therefore a large value of capacitance for the same layout area. The on-chip EBG structure is embedded in the middle of an on-chip power distribution network in which the DLL and an inverter chain acting as a noise source are connected. The measured results showed that the jitter at the DLL clock output is severely increased by the coupled SSN from the inverter chain. However, the operation of the inverter chain did not affect the jitter when the DLL was protected by the on-chip EBG structure.
C. Hwang et al., "Protection of a Delay-Locked Loop from Simultaneous Switching Noise Coupling using an On-Chip Electromagnetic Bandgap Structure," Proceedings of the 2012 IEEE International Symposium on Electromagnetic Compatibility (2012, Pittsburgh, PA), pp. 544-548, Institute of Electrical and Electronics Engineers (IEEE), Aug 2012.
The definitive version is available at https://doi.org/10.1109/ISEMC.2012.6351673
2012 IEEE International Symposium on Electromagnetic Compatibility, EMC 2012 (2012: Aug. 5-10, Pittsburgh, PA)
Electrical and Computer Engineering
Keywords and Phrases
Dielectric Devices; Electromagnetic Compatibility; Metamaterials; MOS Capacitors; Sanitary Sewers; Switching
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Article - Conference proceedings
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