Modeling Injection of Electrical Fast Transients into Power and IO Pins of ICS
A SPICE-based model of a microcontroller was developed to investigate its immunity to electrical fast transients (EFTs). The model includes representations of the on-die power delivery network, the ESD protection clamps, and the I/O driver circuits. Several measurement approaches were developed to characterize the linear and nonlinear components within the model. EFTs were injected into pins of the microcontroller to verify the accuracy of the proposed model. General purpose I/O were tested in several configurations (i.e., pull-up-enabled input, logical-high output, and logical-low output). The model was able to predict the voltage waveform and maximum voltage at each pin within 5~6% of the measured values. A parasitic bipolar junction transistor associated with the output driver was found to have a critical impact on the noise coupled to the power bus. The simplicity and accuracy of this model shows its promise for understanding and predicting immunity issues in integrated circuits.
J. Zhang et al., "Modeling Injection of Electrical Fast Transients into Power and IO Pins of ICS," IEEE Transactions on Electromagnetic Compatibility, vol. 56, no. 6, pp. 1576-1584, Institute of Electrical and Electronics Engineers (IEEE), Dec 2014.
The definitive version is available at http://dx.doi.org/10.1109/TEMC.2014.2332499
Electrical and Computer Engineering
Keywords and Phrases
Electric power transmission; Electromagnetic pulse; Integrated circuits; Measurements; Models; Signal interference; Transients; Electrical-fast-transients; Integrated circuit designs; Measured values; Nonlinear components; Power delivery network; Power distributions; Spice-based model; Voltage waveforms; Power quality; Electromagnetic interference
International Standard Serial Number (ISSN)
Article - Journal
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