Analysis of Current Sharing in Large and Small-Signal IC Pin Models
A comprehensive model of a clock line including large and small signal pin parameters, as well as channel parameters is presented. The small signal model allows analysis of in-band interference which can lead to soft failures, while large signal models allow for the simulation of current sharing between driver/receiver pin pairs.
B. Orr et al., "Analysis of Current Sharing in Large and Small-Signal IC Pin Models," Proceedings of the 36th International Electrical Overstress/Electrostatic Discharge Symposium (2014, Tucson, AZ), vol. 2014-November, no. November, ESD Association, Nov 2014.
36th International Electrical Overstress/Electrostatic Discharge Symposium (2014: Sep. 7-12, Tucson, AZ)
Electrical and Computer Engineering
Keywords and Phrases
Heterojunction bipolar transistors; Channel parameter; Clock line; Comprehensive model; Current-sharing; In-band interference; Large signal models; Small signal model; Soft failure; Signal interference
International Standard Serial Number (ISSN)
Article - Conference proceedings
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